Business News • PR NewsWire • Cadence Achieves First PCI Express 2.0 and PCI Express 3.0 Compliance for TSMC 16nm FinFET Plus Process

Cadence Achieves First PCI Express 2.0 and PCI Express 3.0 Compliance for TSMC 16nm FinFET Plus Process

Cadence Achieves First PCI Express 2.0 and PCI Express 3.0 Compliance for TSMC 16nm FinFET Plus Process

SAN JOSE, Calif., Feb. 25, 2015 /PRNewswire/ -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its multi-protocol Serializer/Deserializer (SerDes) PHY IP for PCI Express® (PCIe®) 2.0 and PCIe 3.0 technology for TSMC's 16nm FinFET Plus (16FF+) process have...

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